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G9 Gateway Processor

G9 Gateway Processor

SemiDrive G9 gateway Processorsare high-performance automotive chips specifically designed for the new-generation central gateways, central computing platforms, and domain fusion controllers. With a multi-core heterogeneous design, G9 comprise high-performance Cortex-A55 CPUs and highly reliable Cortex-R5 real-time processors with dual-core lock-step. Supports new E/E architecture applications, ensuring high functional safety and reliability.

The G9 is fitted with a rich variety of transmission interfaces such as Ethernet, CAN-FD, and LIN, and integrates a network accelerator engine SDPE to enable high-speed and low-latency data exchange. In addition, it also has a built-in HSM and a high-performance encryption and decryption engine to empower AES, RSA, ECC, SHA, and a variety of State Cryptgraphy algorithms in accordance with the application demands of information security.

Product Performance
High-performance Processor
  • Cortex-A55 multi-core processor
  • Multiple groups of lock-step Cortex-R5
  • Efficient inter-core communication
  • Integrates various cross-domain application resources such as display/camera input/GPU etc.
Diverse Range of Network Interfaces with Low-latency Data Forwarding
  • Supports 20 CAN-FDs, dual Gigabit TSN Ethernet, and expandable PCIe3.0 interfaces
  • Integrates exclusive Package Engine to enable low-latency forwarding of CAN/LIN/Ethernet
Information Security
  • Built-in high-performance HSM engine to empower V2X data exchange
  • Certified by State Cryptgraphy Administration; Supports complete State Cryptgraphy algorithms
  • Multiple key management architectures
High Reliability
  • AEC-Q100 reliability certification
  • ASIL B product certification of ISO 26262 for functional safety
  • Supports hardware isolation of multiple systems
  • Integrates a hardware security monitoring module
Application Scenarios
  • Service-oriented gateway
  • Central computing platform
  • Domain fusion controller
Roadmap
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Family
Device NameG9SG9XG9QG9HG9P
Application Processor-1x Cortex-A55,1.4GHz4x Cortex-A55,1.4GHz6x Cortex-A55,1.8GHz8x Cortex-A55,2.0GHz
Secure ProcessorCortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHz
Safety ProcessorCortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHz
Multi-Purpose Processor---Cortex-R5 DCLS,800MHzCortex-R5 DCLS,800MHz
NPU----8 TOP(INT8)
GPU3D---40GFLOPS100GFLOPS
MIPI DSI---2x 4-lane2x 4-lane
MIPI CSI---2x 4-lane2x 4-lane
DRAM Interface-

16-bit, LPDDR4/LPDDR4x, 2133MT/s

16-bit, LPDDR4/LPDDR4x, 2133MT/s

32-bit LPDDR4/LPDDR4x, 3200MT/s

32-bit LPDDR4/LPDDR4x, 3200MT/s

PCle-2x PCle3.0 1-lane2x PCle3.0 1-lane2x PCle3.0 1-lane2x PCle3.0 1-lane
USB1x USB3.0/2.02x USB3.0/2.02x USB3.0/2.02x USB3.0/2.02x USB3.0/2.0
CANFD16x20x20x20x20x
Packet EngineSDPESDPESDPESDPESDPE
SecurityAES/RSA/ECC/SHA,SM2/3/4/9,Support HSMAES/RSA/ECC/SHA,SM2/3/4/9,Support HSMAES/RSA/ECC/SHA,SM2/3/4/9,Support HSMAES/RSA/ECC/SHA,SM2/3/4/9,Support HSMAES/RSA/ECC/SHA,SM2/3/4/9,Support HSM
LIN/UART16x16x16x16x16x
Ethernet2x 1G Ethernet TSN2x 1G Ethernet TSN2x 1G Ethernet TSN2x 1G Ethernet TSN2x 1G Ethernet TSN
Peripheral16x 12C,8x SPI16x 12C,8x SPI16x 12C,8x SPI16x 12C,8x SPI16x 12C,8x SPI
Storage2x SD/SDIO,1x eMMC,2x OSPI/QSPI2x SD/SDIO,1x eMMC,2x OSPI/QSPI2x SD/SDIO,1x eMMC,2x OSPI/QSPI2x SD/SDIO,1x eMMC,2x OSPI/QSPI2x SD/SDIO,1x eMMC,2x OSPI/QSPI
ADC12-bit ADC12-bit ADC12-bit ADC12-bit ADC12-bit ADC
Package19x19 FCBGA 0.8mm Pitch19x19 FCBGA 0.8mm Pitch19x19 FCBGA 0.8mm Pitch21x21 FCBGA 0.8mm Pitch21x21 FCBGA 0.8mm Pitch
Note:
Hardware isolation for each CPU Cluster
All the devices except X9U are pin-to-pin and software compatible.
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